The present invention relates to a technique which can be effectively applied to an electric test technique in a manufacturing method of a semiconductor integrated circuit device (or, semiconductor device).
Japanese Patent Laid-Open No. 7-140168 (Patent Document 1) discloses, in relation to a probe needle having tungsten as the base material for an electric test of a semiconductor device, a technique of doping tungsten with different types of metal such as gold, silver, copper or rhenium in order to prevent adhesion of foreign substance such as alumina from an aluminum pad when inspecting a wafer probe.
Japanese Patent Laid-Open No. 2002-162415 (Patent Document 2) or US Patent application publication No. 2002-153913 (Patent Document 3) corresponding to Patent Document 2 discloses high temperature wafer probe inspection (85° C. or 150° C.) using a palladium-based vertical needle. For the inspection, nickel or nickel alloy is plated over the surface of a palladium-based probe needle in order to keep sufficient pressure against an aluminum-based electrode over a wafer. The base material of the palladium-based probe needle is a palladium-based six-element alloy the composition of which is Pd: 35% by mass, Ag: 30% by mass, Pt: 10% by mass, Au: 10% by mass, Cu: 14% by mass, and Zn: 1% by mass.
Japanese Patent Laid-Open No. 2004-93355 (Patent Document 4) discloses, for wafer probe inspection using a palladium-based probe pin, a technique of doping gold, silver, platinum or the like and rendering the needle point into a non-flat shape in order to prevent solder transfer from the object to be inspected.
Japanese Patent Laid-Open No. 8-115955 (Patent Document 5) discloses, for probe inspection of a device or the like, a technique of coating, over a tin-plated electrode to be inspected, C, Eu, Ir or the like, which does not generate a compound with tin at the tip of a tungsten alloy needle having superior high temperature strength, and also suggests application to palladium alloy needles or the like.